Nehalem

Nehalem is the code name of the next architecture of processors Intel which will succeed the processors Core 2 based on the microarchitecture Core. Envisaged to be launched in the current of the year 2008 and more precisely during the 4th quarter of this same year, the processors with Nehalem architecture will be introduient on the market by initially using a lithographic process of a smoothness of 45nm.

Nehalem is an architecture unified just like the Intel architecture Core, it will be used to equip the various ranges with processors in particular waiters, PC, work stations, portable and another mobile peripheral.

Structure Nehalem

a Native design multi-core (1 to 8 hearts)
a controller report integrated
Interconnections multiprocessors QuickPath Interconnect (exCSI)
HyperThreading (SMT two ways)
Management of the independent energy saving for each heart.
Integration of a graphic controller (according to the versions)
sockets H/B

Design multi-core

Nehalem architecture will integrate a design multi-core nativement, as announced by Paul Ottelini during the IDF Fall 2007 (Intel Developper Forum), equipped with two, four or eight cores a priori within same the silicon die this configuration would be made possible thanks to modular concept and dynamics which would make it possible to offer derivative products of this architecture according to the various segments of the market.

Although announced as being also a native octo-core, Intel with revealed at the time of the IDF Fall a 2007 die stud of Nehalem corresponding according to any probability to a configuration quad-core, the figure of 731 Million transistors with also announced.

Controller Report and QuickPath Interconnections

Same manner as AMD for these Opteron/Athlon64/Phenom Intel with decided to integrate into these future processors relatively similar QuickPath technology in its principle in HyperTransport of its competitor. QuickPath in the past called Common System Interface gathers a controller report as well as a topology of routing and interconnections multiprocessors within Nehalem.

Intel of this fact gives up its traditional topology SMP (Symetric Multi Processor) based on the FSB (Face Side Bus) to direct itself towards an architecture distributed of type DSM (Dritibuted Shared Memory) and more probably towards a topology of the type ccNUMA (Mask Coherence Non uniform Memory Architecture) allowing better a scalability as of these systems.

This reorientation is more or less imposed by the integration increasingly more important of the number of cores within the silicon die, the latter having to be sufficiently supplied with the main memory. Thanks to an architecture with distributed memory, QuickPath makes it possible to provide a band-width optimal memory while eliminating to the maximum the bottlenecks.

Variations

Desktop

BloomField

Bloomfield will be the variation quadricœurs for desktop machine of Nehalem architecture. It will be the first processors to use the Socket LGA1366. it will have 8 Me of L2 Mask and a controller integrated report who will allow to manage the memory DDR3 on three channels.

Lynnfield

Lynnfield is top-of-the-range processors for desktop, envisaged for the first six-month period 2009, it will use the Socket LGA 1160 and will be engraved in 45nm. It will have 8 Me of L2 mask, of a controller report capable of managed the memory DDR3 on two channels and of a controller NCV-Express train.

Havenale

Havenale is processors dual-core for desktop of midrange, planned for the first six-month period 2009, it will use the Socket LGA 1160 and will be engraved in 45nm. It will have a L2 mask of 4 Me, of a controller integrated report able of managed the memory DDR3 on two channels, one will find also a controller NCV-Express train as well as a GPU.

Mobile

Clarksfield

Clarksfield is top-of-the-range processors for laptop, planned for 2009, it will use the Socket 989 and will be engraved in 45nm. It will have 8 Mo of L2 mask, of a controller report capable of managed the memory DDR3 on two channels and of a controller NCV-Express train.

Auburndale

Auburndale is processors of midrange for laptop, planned for 2009, it will use the Socket 989 and will be engraved in 45nm. It will have a L2 mask of 4 Me, of a controller integrated report able of managed the memory DDR3 on two channels, one will find also a controller NCV-Express train as well as a GPU.

Waiter

Gainestown

Gainestown will be the variation Xeon DP of Nehalem.

Beckton

Beckton will be the variation Xeon MP of Nehalem.

After Nehalem

Architecture Westmere will consitera in a die-shrink of the architeture Nehalem in 32nm.

Following architecture will name Sandy-Bridge and should leave in 2010 and probably benefit from a smoothness from Gravure from 32nm.

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