List Intel microprocessors

This list of the Microprocesseur S Intel tries to present all the Processeur S Intel since the pioneer 4 bits 4004 (1971) until the high-end of today, the 64 bits Itanium 2 (2002) and the Pentium 4 with Intel 64 (2004). Concise technical information is given for each product.

Processors 4 bits and 8 bits

Intel 4004: 1st µP on only one chip

  • Speed of clock 740 Khz
  • 0,06 MIPS
  • Width of the bus 4 bits (adress bus/given multiplexed due to a limited number of pins)
  • PMOS
  • Many transistors 2.300 to 10 µm
  • addressable Memory 640 bytes
  • Memory of program 4 Kio
  • First microcontrolor in the world
  • Used in the calculator Busicom
  • Note:: The original goal was to equalize the speed of clock of the IBM 1620; what was not the case.

4040

  • Presented in 1974
  • Speed of clock of 500 Khz to 740 Khz using of the crystals from 4 to 5.185 MHz
  • 0,06 MIPS
  • Width of the bus 4 bits (adress bus/given multiplexed to a limited number of pins)
  • PMOS
  • Many transistors 3.000 to 10 µm
  • addressable Memory 640 bytes
  • Memory of program 8 Kio
  • Interruptions
  • Version improved of the 4004

8008

  • Presented on April 1st 1972
  • Speed of clock 500 Khz (8008-1: 800 Khz)
  • 0,05 MIPS
  • Width of the bus 8 bits (adress bus/given multiplexed to a limited number of pins)
  • PMOS
  • Many transistors 3.500 to 10 µm
  • addressable Memory 16 Kio
  • Typically in generic terminals, computers
  • Developed at the same time as the 4004
  • Originally intended for the use in the terminal Datapoint 2200.

8080

  • Presented on April 1st 1974
  • Speed of clock 2 MHz
  • 0,64 MIPS
  • Width of the bus 8 bits given, 16 bits of addresses
  • NMOS
  • Many transistors 6.000 to 6 µm
  • addressable Memory 64 Kio
  • 10X the performances of the 8008
  • Used in the Altair 8800, controller of light on control panels, cruise missiles
  • Asked for 6 chips of support against 20 for the 8008

8085

  • Presented in March 1976
  • Speed of clock 5MHz
  • 0,37 MIPS
  • Width of the bus 8 bits of data, 16 bits of address
  • Many transistors 6.500 to 3 µm
  • Used in Toledo scale
  • High level of integration, operative for the first time on a food of 5 volts, contrary to 12 volts previously

Processors 16 bits: Origins of the X86

8086

  • Presented the June 8th 1978
  • Speed of clock:
    • 5 MHz for 0,333 MIPS
    • 8 MHz for 0,66 MIPS
    • 10 MHz for 0,75 MIPS
  • Width of the bus 16 bits given, 20 bits of address
  • Nombre of transistors 29.000 to 3 µm
  • addressable Mémoire 1 Me
  • 10X the performances of the 8080
  • Utilisé in the laptops
  • Instruction set compatible with the 8080
  • Uses registers with segment to reach more than 64 Kio of data in once, concern the main thing of the programmers for the following years.

8088

  • Presented on June 1st 1979
  • Speed of clock:
    • 5 MHz for 0,33 MIPS
    • 8 MHz for 0,75 MIPS
  • Architecture interns 16 bits
  • Largeur of the external bus, 8 bits of data, 20 bits of addresses
  • Nombre of transistors 29.000 to 3 µm
  • addressable Mémoire 1 Me
  • Identique to the 8086 except for its external bus of 8 bits
  • Utilisé in the IBM PC S and clones PC


iAPX 432 (entered chronological)

  • Presented the Multichip on January 1st 1981
  • Processor; The first Intel microprocessor 32 bits
  • See iAPX 432

80186

  • Presented in 1982
  • Used in the majority of the embarked applications - controllers, systems sales outlet, terminals…
  • Includes two timers, a controller DMA, and a controller of interruption on the chip in addition to the Later famous processor
  • the iAPX 186

80188

  • a version of the 80186 with an external data bus on 8 Later famous bits
  • the iAPX 188

80286

  • Presented the 1982
  • Speed of clock:
    • 6 MHz for 0,9 MIPS
    • 8 MHz, 10 MHz for 1,5 MIPS
    • 12,5 MHz for 2,66 MIPS
  • Largeur of the bus 16 bits
  • Includes a material protection of the memory at that time to support the multi-task operating systems with a space of addressing per process
  • Nombre of transistors 134.000 to 1,5 µm
  • addressable Mémoire 16 Me
  • Ajoutait the mode protected to the 8086 with primarily same the Instruction set
  • 3 with 6X the performances of the 8086
  • Largement used in clones PC
  • Can traverse the Encyclopædia Britannica in 45 seconds

Processors 32 bits: Non-x86

iAPX 432

  • Presented on January 1st 1981 like the first microprocessor 32 bits of Primitive Intel
  • Capacity of architecture object
  • microcoded operating system
  • a terabyte of space of virtual addresses
  • material Support of the fault generic tolerance
  • Processor (GDP) in two chips, the 43201 and the 43202
  • 43203 Interface processor (IP) interfaces the subsystem of i/o
  • 43204 Unit of interface of bus (BIU) simplifies the manufacture of systems Multiprocesseur S
  • 43205 Control unit report (MCU)
  • Architecture and internal unit of execution of the data in 32 bits
  • Speed of clock:
    • 5 MHz
    • 7 MHz
    • 8 MHz


80186, 80188,80286,80386 (DX) (entered chronological)

  • Presented in 1981 - 1988
  • to see the synopsis

i960 or 80960

  • Présenté the April 5th 1988
  • Architecture 32 bits RISC-like
  • Before very used in the embarked systems
  • evolved/moved starting from the processors developed for the joint BiiN venture with Siemens
  • Several alternatives identified by suffixes with two-letters.


80386SX (entered chronological)


80376 (entered chronological)

i860 or 80860

  • Presented the February 27th 1989
  • First processor of Intel Superscalaire
  • Architecture RISC 32/64 bits, with characteristics very visible pipeline for the programmers
  • Used in the Intel Paragon supercomputer massively parallel

Processors 32 bits: The series of the 80386

80386DX

  • Presented the October 17th 1985
  • Speed of clock:
    • 16MHz for 5 to 6 MIPS
    • 2/16/1987 20 MHz for 6 to 7 MIPS
    • 4/4/1988 25 MHz for 8,5 MIPS
    • 10/4/1989 33 MHz for 11,4 MIPS (9,4 SPECint92 on Compaq/i 16K L2)
  • Width of the bus 32 bits
  • Many transistors 275.000 to 1 µm
  • addressable Memory 4 Gio
  • virtual Memory 64 Tio
  • First chip x86 handling data 32 bits
  • Protection worked over again and improved memory including paginated virtual memory and a virtual mode 8086, functions requests by Windows 95 and OS/2 Warp
  • Used in the desktop machines
  • Can sufficient address memory to manage the history of each person on ground on eight page
  • Can traverse Encyclopædia Britannica in 12,5 seconds


80960 (i960) (entered chronological)

80386SX

  • Presented the June 16th 1988
  • Speed of clock:
    • 16MHz for 2,5 MIPS
    • 1/25/1989 20 MHz for 2,5 MIPS, 25 MHz for 2,7 MIPS
    • 10/26/1992 33 MHz for 2,9 MIPS
  • internal Architecture in 32 bits
  • Largeur of the external bus on 16 bits
  • Nombre of transistors 275.000 to 1 µm
  • addressable Mémoire 16 Me
  • virtual Memory 256 Gio
  • the width of the external bus on 16 bits allows manufacture reduced cost of a processor 32 bits
  • built-in Multitâche
  • Utilisé in the desktop machines of line entry and the computers transportable

80376

  • Presented the January 16th 1989; Decree the June 15th 2001
  • Alternative of the 386 for the systems embarked.
  • No “real Mode”, starts directly in “Mode protected”
  • Remplacé by most known 80386EX as from 1994


80860 (i860) (entered chronological)


80486DX (entered chronological)

  • Presented the summary April 16th 1989
  • See

80386SL

  • Presented the October 15th 1990
  • Speed of clock:
    • 20MHz for 4,21 MIPS
    • 9/30/1991 25MHz for 5,3 MIPS
  • Architecture interns in 32 bits
  • Largeur of the external bus on 16 bits
  • Nombre of transistors 855.000 to 1 µm
  • addressable Mémoire 4 Gio
  • virtual Memory 64 Tio
  • First chip especially manufactured for the computers transportable thanks to low fuel consumption of the chip.
  • Highly integrated, included the masks, bus, and controllers report


80486SX/DX2/SL, Pentium, 80486DX4 (entered chronological)

  • Presented in 1991-1994
  • See summary

Intel386 EX

  • Presented in August 1994
  • Alternative of the 80386SX for the System embarked S
  • heart static, ex: can turn as slowly as desired (and thus more economic in energy), to zero to extinguish it
  • integrated Péripheriques:
    • Clock and management of energy
    • Timers/meters
    • Watchdog timer
    • Units of i/o series (synchronous and asynchronous) and parallel i/o
    • DMA
    • cooling of the RAM
    • JTAG test logic
  • had much more success than the 80376
  • Utilisé has edge of several satellites and microsatellites in orbit
  • Utilisé in the project of NASA FlightLinux

Processors 32 bits: The series of the 80486

80486DX

  • Presented the April 10th 1989
  • Speed of clock:
    • 25 MHz for 20 MIPS (16,8 SPECint92, 7,40 SPECfp92)
    • 7/5/1990 33 MHz for 27 MIPS (22,4 SPECint92 on Micronics M4P 128k L2)
    • 6/24/1991 50 MHz for 41 MIPS (33,4 SPECint92, 14,5 SPECfp92 on Compaq/50L 256K L2)
  • Width of the bus 32 bits
  • Many transistors 1,2 million with 1 µm; the 50 MHz is with 0,8 µm
  • addressable Mémoire 4 Gio
  • virtual Memory 64 Tio
  • Cache of level 1 in the chip
  • 50X the performances of one 8088
  • Utilisé in the desktop machines and waiters


80386SL (entered chronological)

80486SX

  • Presented the April 22nd 1991
  • Speed of clock:
    • 9/16/1991 16MHz for 13 MIPS, 20 MHz for 16,5 MIPS
    • 9/16/1991 25MHz for 20 MIPS (12 SPECint92)
    • 9/21/1992 33MHz for 27 MIPS (15,86 SPECint92)
  • Width of the bus 32 bits
  • Many transistors 1,185 million with 1 µm and 900.000 to 0,8 µm
  • addressable Memory 4 Gio
  • virtual Memory 64 Tio
  • Design identical to the 486DX but without the mathematical coprocessor
  • Used in computers 486 of line entry for office
  • Possibility of update with an Overdrive Intel

80486DX2

  • Presented the March 3rd 1992
  • Speed of clock:
    • 50MHz for 41 MIPS (29,9 SPECint92, 14,2 SPECfp92 on Micronics M4P 256K L2)
    • 10/8/1992 66 MHz for 54 MIPS (39,6 SPECint92, 18,8 SPECfp92 on Micronics M4P 256K L2)
  • Largeur of the bus 32 bits
  • Nombre of transistors 1,2 million with 0,8 µm
  • addressable Mémoire 4 Gio
  • virtual Memory 64 Tio
  • Utilisé in the desktop machines high performances at low prices
  • Uses a “lapping machine speed” technology where the heart of the microprocessor turns twice more quickly than the bus

80486SL

  • Presented the November 9th 1992
  • Speed of clock:
    • 20 MHz for 15.4MIPS
    • 25 MHz for 19 MIPS
    • 33 MHz for 25 MIPS
  • Width of the bus 32 bits
  • Many transistors 1,4 million with 0,8 µm
  • addressable Memory 64 Me
  • virtual Memory 64 Tio
  • Used in notebook GCV


Pentium (entered chronological)

80486DX4

  • Presented the March 7th 1994
  • Speed of clock:
    • 75 MHz for 53 MIPS (41,3 SPECint92, 20,1 SPECfp92 on Micronics M4P 256K L2)
    • 100 MHz for 70,7 MIPS (54,59 SPECint92, 26,91 SPECfp92 on Micronics M4P 256K L2)
  • Many transistors 1,6 million with 0,6 µm
  • Width of buses 32 bit
  • addressable Memory 4 Gio
  • virtual Memory 64 Tio
  • Many pins 168 PGA Package, 208 SQFP Package
  • Size of Die 345 mm ²
  • Used in the desktop machines and notebooks

Processors 32 bits: Pentium (" I")

Pentium

  • Presented the March 22nd 1993
  • Speed of clock:
  • Width of the bus 64 bits
  • Adress bus 32 bits
  • Many transistors 3,1 million to 0,8 µm
  • addressable Memory 4 Gio
  • virtual Memory 64 Tio
  • Many pins 273 PGA Package
  • Dimensions 2,16" X 2,16"
  • Architecture Superscalaire giving 5X the performances of the processor 486DX to 33MHz
  • Functions on a food of 5 volts
  • Utilisé in the desktop machines


80486DX4 (entered chronological)


80386EX (Intel386 EX) (entered chronological)

  • Presented in August 1994
  • See summary

Pentium MX

Processors 32 bits: Pentium Pro, II, III, M

Pentium Pro: Ur-P6

  • Alternatives
    • 150,166,180,200 MHz Presented on November 1st 1995
    • 200 MHz (1 Me Hides L2) Présenté the August 18th 1997

Pentium II


Pentium II Xeon entered)

Pentium III

Pentium II and III Xeon

  • PII Xeon
  • Alternatives
  • PIII Xeon
  • Presented the October 25th 1999
  • Many transistors: 9,5 million with 0,25 µm or 28 million with 0,18 µm)
  • of mask L2 is 256 Kio, 1Moi, but 2Moi Advanced Transfer Hides (Integràed)
  • Packaging of the processor in Single Edge Contact Cartridge (S.E.C.C.2) or SC330
  • Speed of the bus system 133 MHz (256 Kio hides L2) or 100 MHz (1-2 Me hides L2)
  • Largeur of the bus Système 64 bit
  • addressable Mémoire 64 Gio
  • Utilisé in the waiters two-way and work stations (256 Kio L2) or waiters 4 - and 8-way (1-2 Me L2)
  • Variantes


Pentium 4 (not 4EE, 4th, 4F), Itanium, Xeon based on P4, Itanium 2 (entered chronological)

  • Presented in April 2000 - July 2002
  • See summary

Pentium M

  • Presented in March 2003
  • Manufactured on the process 0,13 µm
  • Based on the heart of mobile Pentium III
  • System center of Intel “Centrino”; “Banias” (1,4, 1,5,1,6,1,7,1,8,1,9,2,2,2 GHz)
  • Drunk system with 400 MHz.

Processors 32 bits: The series of Pentium 4

Pentium 4

  • Manufactured with the Process 0,18 µm (1,40 and 1,50 GHz)
    • Presented the November 20th 2000
    • Mask of second level of 256 Kio, Advanced Transfer Hides (integrated)
    • Packaging of the processor in PGA423, PGA478
    • Speed of the bus system 400 MHz
    • Extensions SE SIMD
    • Nombre of transistors 42 million
    • Utilisé in the desktop machines and the work stations
  • Fabriqué with the Process 0.18 µm (1.7 GHz)
    • Présenté the April 23rd 2001
    • Voir chips 1.4 and 1.5 for more details
  • Manufactured with the Process 0.18 µm (1.6 and 1.8 GHz)
    • Presented the July 2nd 2001
    • See chips 1.4 and 1.5 for more details
    • Food of the heart in 1.15 volts in maximum performance mode, 1.05 volts in mode of optimization of the batteries
    • Food <1 Watt in mode of optimization of the batteries
    • Used in the portable PC of size normals then extra-light the
  • Manufactured with the Process 0.18 µm “Willamette” (1.9 and 2.0 GHz)
  • Pentium 4 (2 GHz, 2.20 GHz)
  • Pentium 4 (2.4 GHz)
  • Fabriqué with the Process 0.13 µm “Northwood has” (1.7, 1.8,1.9,2,2.2,2.4,2.5,2.6 GHz)
    • Bus system to 400 MHz.
  • Manufactured with the Process 0.13 µm “Northwood B” (2.26, 2.4,2.53,2.66,2.8,3.06 GHz)
    • Drunk system with 533 MHz. (3.06 included technology Hyper threading of Intel).
  • Manufactured with the Process 0.13 “Northwood C” (2.4, 2.6,2.8,3.0,3.2 GHz)
    • Drunk system with 800MHz (all the versions include Hyper Threading)
    • 6500 to 10000 MIPS


Itanium (entered chronological)

Xeon

  • official Designation Xeon, and not e.g. “Pentium 4 Xeon”
  • Xeon 1,4,1,5,1,7 GHz
    • Présenté the May 21st 2001
    • Cache of second level of 256 Kio Advanced Transfer Hides (integrated)
    • Packaging of the processor: Organic Lan Grid Array 603 (OLGA 603)
    • Speed of the bus system 400 MHz
    • Extensions SE SIMD
    • Used in the computers high efficiencies and work stations bi-processors
  • Xeon 2.0 GHz


Itanium 2 (entered chronological)

  • Presented in July 2002
  • See summary

Pentium 4EE

  • Presented in September 2003
  • EE = “Extreme Edition”
  • like the processor Pentium 4, but with 2 Me of mask of third level included

Pentium 4th

  • Presented in February 2004
  • Manufactured with the process 0.09 µm (90 Nm) “Prescott” (2,8, 3,0,3,2,3,4) 1 Me of mask L2
  • Drunk system to 533/800 MHz system drunk (all the versions include Hyper Threading except the 2,8 Ghz (533))
  • the pipeline of instruction of the entireties was lengthened from 20 to 32 floors, which theoretically increases the power by 1 MHz.
  • 7500 to 11000 MIPS

Pentium 4F

  • Présenté to the Printemps 2004
  • Même heart that 4th, “Prescott”
  • 3,2-3,6 GHz
  • Beginning of the next changes of P4, the extensions Intel 64 64-bit extensions is built-in

Processors 64 bits: Itanium &…

Itanium

Itanium 2


Pentium M (entered chronological)


Pentium 4EE, 4E (entered chronological)

  • Presented in September 2003, February 2004, respectively
  • See summary

Intel 64

  • Initially called IA-32e then EM64T (for Extended Memory 64 Technology)
  • Presented to spring 2004, with Pentium 4F
  • Extension for architecture 64-bit of the series of the X86 clone close to that of AMD64

See too

  • List of microprocessors AMD
  • List of Model microprocessors
  • of the processors Intel

External bonds

  • Intel Museum: History of the microprocessor
  • the Guide of the x86

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