Electronic CAD

See also: CAD

Electronic CAD (for Computer-aided design electronic), also named in English EDA for Electronic design automation, is the category of the tools being used for the design and the production of the electronic systems going of the printed circuits until the integrated circuits.

Terminology

The term CAD is also used to indicate mechanical CAD, the Conception computer-assisted and the Fabrication computer-assisted electronic in and electrotechnical. The use of this term is probably due to the committee of design to the technical automation of the IEEE.

In the industrial sector, they are the electronic originators of circuits of the companies of semiconductors which use the CAD. The large circuits are too complex to be conceived with the hand and require adequate computer tools.

Development of the CAD

The CAD quickly gained in importance with the continual miniaturization of the technology of the Semi-conducteur S according to the Loi of Moore.

The engineers of the foundries carry out and test circuits on computer before launching manufacture. The companies service-concept use also the software of CAD to evaluate new concepts and to prepare them for manufacture. The tools of CAD are also used to synthesize and implement functions in FPGA S.

History

Before the CAD, the integrated circuits were conceived and manufactured with the hand. Some advanced stores employed a geometrical software to create the tracks with the Photoplotter Gerber. The process was primarily graphic, with a passage of the electronic diagram towards a copy for the machine of insolation with UV. Best the undertaken known one at that time was Calma. Its format GDSII ( Graphic Dated System II ) is still used nowadays.

Towards half of the Years 1970, developers started to automate the design via tools of pointing and routing which innovated compared to the design software. The concepts used at that time are of good part resulting from the Design Automation Conference (a technical and commercial meeting of the specialists in the field).

The following stage in the electronic CAD began with the publication from the book “Introduction to system VLSI” written by Carver Mead and Lynn Conway in 1980. This revolutionary text recommended the design of circuits with computer programming languages. The source code of a diagram was then transformed to obtain the material version of the circuit. This new approach made it possible to carry out circuits 100x more complex than before. Moreover, innovations in the methods of checking and simulation facilitated the work of the originators enormously. The realization of the circuits was not only easier but also surer and cheaper because it was from now on possible to simulate the behavior of electronics on a computer before passing to manufacture.

The first tools of CAD were developed in the academic medium and were distributed in the public domain. One of most famous was “Berkeley VLSI Tools Tarball”, a whole of utilities UNIX employed to carry out the first VLSI. Another significant development was the creation of MOSIS, a consortium of universities and manufacturers who reflect in place an effective methodology to train the future originators of electronic circuits. The students used technologies not very expensive but tested to carry out circuits. The circuits resulting from several projects were then gathered on some Wafer S (silicon wafers) of the line production of the manufacturer, the remainder of the wafers being in general the same circuit produced by the manufacturer on an industrial scale. This program was useful at the same time for the MOSIS which could continue its activities with limited costs, and the manufacturers who could develop their long-term activity while benefitting from competences as well as network formed by MOSIS.

In 1981, the CAD becomes gradually an industrial activity. During several years, more the large companies of electronics, such as Hewlett Packard, Tektronix, and Intel, developed their own CAD. In 1981, managers and developers left these companies for developer of the software continuations specialized in this field. Daisy Systems, Mentor Graphics, and Valid Logic Systems was all at this time founded, and is gathered under the term of DMV . Other companies launched out in this market, with multiple contributions and specializations.

In 1985, Verilog, a concept of high-level language, were the first material language of description. It was developed by Gateway. In 1987, the Department of Defense of the United States financed the creation of VHDL, a language of specification of the circuits. The tools quickly used this language to allow a direct simulation of the logic of the circuit. Later, other extensions were carried out to allow the synthesis of the circuits. The majority of the principal companies are rather amalgams of small companies. This tendency is amplified by the production by the small companies of tools of design which are integrated naturally in a software continuation made up of a broad range of tools (" Tool Flow")

Whereas the first tools were intended for the digital circuits, the more recent tools make it possible to work on analogical or hybrid circuits. The tendency which consists in inserting numerical and analogical electronics on the same chip obliges the originators to have tools supporting these two operating processes.

The continuations of tools for the digital circuits are very modular. Starting from the source code of the circuit, a first synthesis makes it possible to convert the circuit into a succession of logical modules (in general independent of the target material). These modules are then transformed and adapted according to the target material by taking account of several constraints: many doors and logical units at disposal, frequency of the circuit, memory available, etc the manufacturers in general provide libraries of their components in order to facilitate simulation. These libraries are often compatible with the principal tools used in industry.

The design of analogical circuits is less modular. The constraints are larger and more difficult simulation: interactions between the complex components larger, physical phenomena, imperfections.

Stages of production

The CAD is divided into several under-stages. They are aligned most of the time with the manufacturing process of the concept to mask creation. What follows applies to the creation of circuit/ASIC/FPGA but this methodology is similar to that applied for the conventional circuits:

  • Concept and architecture: the diagram of the circuit is conceived and implemented in Verilog, VHDL, SPICE or other formats sometimes owners

  • Floorplanning or optimization: a stage of preparation which consists in creating a chart of the sites of the logical doors on the chip, the sources and the groundings, the inputs/outputs, and the hardware macros (component complexes like processors, DSP, memories, etc). This stage is similar to that of a town planner who would set up the residential zones, commercial and industrial in a city.
  • logical Synthesis: translation of the description of the circuit, its logical description (RTL, register transfer logic ) (often specified thanks to a dedicated language or a HDL like Verilog or VHDL) towards a network made up of logical doors and rudimentary elements. The site of the elements is not specified yet at this stage, one is satisfied to draw up a list of the elements necessary to fulfill the desired functions.
  • Synthesis of the behavior, high level synthesis or algorithmic synthesis: the level of abstraction is higher than with the logical synthesis. A behavioral description is converted towards a logical description which could be synthesized. One uses languages like VHDL (behavioral description), SystemC or C++. At exit, one obtains a description in VHDL or Verilog.
  • IP-core: description of a logical unit complexes which can be re-used or sometimes modified by the customer
  • Base of given CAD: database special for the CAD. Necessary since the principal goal of DBs, historically, forever reached
  • Simulation: simulate an operation of the circuit in order to check the exactitude and the performances of the circuit.
    • Simulation of transistor - Simulation of transistor of low level of a schéma/du behavior, precis on the level device.
    • logical simulation - digital simulation of RTL or digital simulation of the behavior of the list of connection of the doors (Boolean 0/1), precis at the Boolean level.
  • Clock Domain Crossing Checking (CDC check): Similar to the use of Lint, but these control/tools is specialized in the detection and the report/ratio of potential problem like the loss of data, the metastability due to the use of many clock.
  • formal Checking, also called control of the model: try to show, by mathematical methods, that the system has properties wished, and that the adverse effects (such as plantings) cannot arrive.
  • Checking of the similarities: Comparison enters the description RTL of the circuit and the list of connection of the doors virtual, to make sure of the same operation at the logical level.
  • Analysis of the power and optimization: improve the circuits to reduce the power asked to function, without affecting the functions.
  • To place and switch, BY: (for the numerical material) automated Positioning of the tools, of the logical doors and other composing with chart of the list of connection of the doors, then subsequent routing of the concept, which adds wire to connect the signals of the components and the power final.
  • Analysis of static synchronization: Synchronization of a circuit in a way independent of the entry analyzes, and consequently to find the worst case among all the entries.
  • Provision of transistor: (for analogical material/mixed signal), sometimes called - a diagram is converted into chart of provision showing the installation of the material.
  • Concept for manufacture: tools to improve a concept to make simpler and less expensive manufacture.
  • Design closure: Concept of Ci with constraints, and regulates a problem which often in created worse. Design closure is the process of convergence for a concept which satisfies all the constraints at the same time.
  • Analysis of.

    • Power network design and analysis

    • Physical checking, statement: checking yew has design is physically manufacturable, and that the resulting chips will not cuts any function-preventing physical defects, and will meet original specifications.
      • Design rule checking, DRC - checks has number off rules regarding placement and connectivity required for manufacturing.
      • Layout versus schematic, LVS - checks yew designed chip layout matches schematics from specification.
      • Layout extraction, RCX - extracts Netlist S from layout, including parasitic resistors (PRE), and often capacitors (RCX), and sometimes inductors, inherent in the chip layout.
    • Mask dated preparation, MDP: generation off actual Lithography Photomask used to physically manufacture the chip.
      • Resolution enhancement technical, RET - methods off increasing off quality off final Photomask.
      • Optical proximity correction, OPC - up-face compensation for Diffraction and Interference effects occurring later when chip is manufactured using this mask.
      • Mask generation - generation off flat mask image from hierarchical design.
    • Manufacturing Test
      • Automatic test pattern generation, ATPG - generates pattern-dated to systematically exercise ace many logic-spoil, and other components, possible ace.
      • Built-in coil-test, but BIST - installs coil-contained test-controllers to automatically test has logic (gold memory) structure in the design
      • Design For Test, DFT - adds logic-structures to has spoils-netlist, to facilitate post-manufacture (die/wafer) defect testing.
    • Technology CAD, but TCAD, simulates and analyzes the underlying process technology. Semiconductor process simulation, the resulting doping agent profile, and electrical properties off devices are derived directly from device physics.
    • Electromagnetic field solver S, gold just field solver S, solve Maxwell' S equations directly for boxes off interest in IC and PCB design. They are known for being slower goal more accurate than the Layout extraction above.
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    Largest companies and their stories Well before the Computer-aided design Electronic , the use of the computers to help with the tasks of developments existed already, and the software was available to the sale. For example, Calmed, Applicon, and Computervision, at the end of the Sixties, sold development and digitizing softwares used for Ci. Zuken Inc. in Japan, in 1976, sold PC softwares of office. Since these tools had value, they did not help for the stage of the design of the process, which was always carried out with the hand. Software of design assisted developed in the Seventies, in academy and in large companies, but it was only with beginning of the year 80 that the software to help at the stage of the design of the process was available to the sale.

    In 1981, Mentor Graphics is founded by dirigants of Tektronix, Daisy Systems is mainly founded by developers of Intel, and Valid Logic Systems by originators of Lawrence Livermore National Laboratory and Hewlett Packard. During this time of the companies such as Calmed and Zuken try to extend to the design, as well as for the development, part of the market.

    When the Electronic CAD started, of the analysts categorized these companies like a niche in the market of the “computer-aided design”. Because the CAD includes/understands primarily the drawing tools of design mechanical for the bridges, the buildings and the cars. A few years after these ideas disappear, and today no company specializes neither in the mechanical design assisted nor in the electric assisted design.

    founded Rate Design Systems towards half of the Eighties, specialized in the physical concept of Ci. Synopsys founded approximately at the same time developed the logical Synthèse. Both developed and are now the largest suppliers of tools of CAD. Magma Design founded Automation in 1997 to take the advantage with simplifications possible while building. -->

    Largest companies and their stories

    Interchange formats

    • GDSII
    • OpenAccess
    • LEF/DEF ( Library Exchange Format/Design Exchange Format )
    • Verilog/SystemVerilog
    • VHDL ( Very High Speed Integrated Circuit Hardware Description Language )
    • IDF

    See too

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